The present invention relates to a full-wave rectifier circuit and in particular to a means for improving the frequency of an RMS (root mean-square) converter.
Referring to FIG. 1, a typical commerically available analog log-antilog computing RMS converter 10 is illustrated (e.g., Analog Devices AD637). These RMS converters are provided in the form of pre-packaged integrated circuits.
The input signal is applied to terminal 12. The resistors 14, 16, the op-amp 18, and the diodes 20, 22 act as an inverting half-wave rectifier. The resistors 24, 26 form a summing stage that results in a full-wave rectified version of the input signal at the inverting input of the amplifier 28. The remainder of the RMS converter provides the necessary log-antilog functions and averaging (note the external averaging capacitor 30) in order to provide an output signal at the terminal 32 indicative of the RMS value of the input signal.
The pre-packaged, commerically available RMS converter 10 is typically useful for input signal frequencies up to 100 kilohertz. At 1 megahertz, the error can be as much as 10 percent. This is primarily due to the capacitances of the diodes 20, 22 which prevent the rapid switching of the half-wave rectifier necessary for higher frequency operation.